This invention relates to an amplifier circuit for driving a capacitive load according to an input signal voltage varying at, for example, specific intervals of time and a liquid-crystal display unit using the amplifier circuit, and more particularly to a small-size, low-power-consumption amplifier circuit suitable for integration.
A liquid-crystal display unit is generally comprises a liquid-crystal display panel, a liquid-crystal display driving circuit for driving the liquid-crystal display panel by supplying image signals to the signal lines, and a scanning line selector circuit for selectively driving the scanning lines. In the liquid-crystal display panel, liquid-crystal cells are arranged in a matrix. Also in the panel, signal lines to which image signals are supplied and scanning lines are provided in such a manner that the former intersect the latter.
An amplifier circuit in a voltage follower configuration was used in the signal-line drive circuit of the liquid-crystal display drive circuit in the liquid-crystal display unit. Since the gain A of the amplifier circuit is finite, the error difference between the input and output of the voltage follower configuration is expressed by 1/A of the input voltage. To decrease the difference, an amplifier circuit in a two-stage configuration was used. Specifically, the amplifier circuit includes an input amplifier stage and an output amplifier stage with a phase compensation capacitor Cf.
With this configuration, when a load capacitor connected to the output amplification stage is large, the phase compensation capacitance has to be made as large as, for example, 3 to 5 pF, to operate the amplifier circuit stably with less power consumption. In addition, the transconductance at the second amplification stage has to be made high by making the bias current larger. As a result, when a drive circuit including, for example, 300 units of the amplifier circuit is integrated, a total of 900 to 1500 pF is required because a phase compensation capacitor Cf of 3 to 5 pF is needed for each amplifier circuit. This causes the problem of making the chip area very large. Another problem is that the drawn current is increased to make the operation stable.
As described above, in the case of amplifier circuits connected to large capacitive loads, the conventional method of stabilizing the amplifier circuits by phase compensation capacitances had disadvantages in that the sum total of phase compensation capacitances needed in integrating amplifier circuits became very large and therefore the chip area increased, leading to a rise in cost. Another problem was that the drawn current increased.
The object of the present invention is to provide an amplifier circuit which not only reduces the chip area by either eliminating a phase compensation capacitance for stabilization or decreasing the capacitance considerably and operates stably but also decreases the drawn current.
According to the present invention, there is provided an amplifier circuit comprising: a plurality of amplification stages which are cascade-connected between a signal input terminal and a signal output terminal to which a capacitive load is connected and which includes at least an input amplification stage and an output amplification stage; and a resistor circuit including at least a resistor inserted between the output terminal of the output amplification stage and the signal output terminal.
The resistor circuit includes a plurality of resistors. At least one selected from the resistors is connected between the output amplification stage and the signal output terminal. Alternatively, the resistor circuit includes a plurality of resistors and switches. The resistance of the resistor circuit is set by the turning on and off of the switches. Furthermore, the resistor circuit may be comprised of the on resistance of a field-effect transistor.
In the invention, there is provided a feedback loop for applying feedback from the output terminal of the output amplification stage to the input terminal of the input amplification stage. The amplifier circuit is constructed in voltage follower configuration.
With the amplifier circuit of the above configuration, it is desirable that the frequency of a second pole appearing in an open loop frequency characteristic of the amplifier circuit should be lower than the frequency (unity gain frequency) at which the gain of the amplifier circuit is 1 and the frequency of a first zero in the open loop frequency characteristic should be set lower than the frequency at which the gain of the amplifier circuit is 1.
Furthermore, a capacitance (phase compensation capacitance) may be provided between the input and output terminals of the output amplification stage to stabilize the operation when, for example, the signal output terminal is disconnected from the capacitive load in the input offset voltage mode and the load capacitor becomes smaller equivalently.
With an amplifier circuit of the present invention, the resistive component of the resistor circuit forms a first zero with the capacitive component of the capacitive load inserted between the output terminal of the output amplification stage and the signal output terminal in the open loop frequency characteristic of the amplifier circuit. The advance of the phase at the zero compensates for a delay in the phase caused by the pole at the output amplification stage. Specifically, because the phase margin, a difference of xe2x88x92180xc2x0 from the phase in which the gain is 1, can be made large, a phase compensation capacitance for stabilizing the operation of the amplifier circuit is not necessary. Even when a phase compensation capacitance is needed, it value may be very small. This helps not only decrease the chip area needed to form a phase compensation capacitance but also reduce the drawn current.
In the amplifier circuit of the invention, when an input signal voltage changing at specific intervals of time is inputted to the signal input terminal, it is desirable that the time constant determined by the resistor circuit and the capacitive component of the capacitive load should be set at more than zero and not more than ⅕ of the specific interval. In this case, the resistance of the resistor circuit should be more than zero and not more than 50 kxcexa9.
The amplifier circuit of the invention may further comprises a control section for sensing that the input signal voltage inputted to the signal input terminal has changed to a specific polarity and controlling a bias current to the output amplification stage.
The present invention may be applied to a two-input amplifier circuit including a positive-side amplifier-circuit and a negative-side amplifier circuit to which a first and a second input signal changing to the positive side and negative side with respect to a specific common voltage are inputted.
According to a preferred mode of the two-input amplifier circuit, the positive-side amplifier circuit comprises a first differential transistor pair to which the first input signal is inputted, a first current source for supplying a tail current to the first differential transistor pair, a first current mirror circuit whose current input terminal and current output terminal are connected to the two output terminals of the first differential transistor pair, and a first switch provided between the two output terminals of the first differential transistor pair, and the negative-side amplifier circuit comprises a second differential transistor pair to which the second input signal is inputted, a second current source for supplying a tail current to the second differential transistor pair, a second current mirror circuit whose current input terminal and current output terminal are connected to the two output terminals of the second differential transistor pair, and a second switch provided between the two output terminals of the second differential transistor pair, wherein the first switch is brought into the off state and the second switch is brought into the on state when the first input signal is inputted to the positive-side amplifier circuit, and the first switch is brought into the on state and the second switch is brought into the off state when the second input signal is inputted to the negative-side amplifier circuit.
The output amplification stage includes a complementary transistor pair whose drains or collectors are connected to the output terminal of the output amplification stage, the gate or base of one of the complementary transistor pair being connected to one output terminal of the positive-side amplifier circuit and the gate or base of the other of the complementary transistor pair being connected to one output terminal of the negative-side amplifier circuit.
The two-input amplifier circuit requires no phase compensation capacitance or a very small capacitance. In addition, the bias current to the output amplification stage can be set easily by short-circuiting the output terminals of the differential transistor circuit in the inactive one of the positive-side and negative-side amplifier circuits.
Furthermore, in another mode of the two-input amplifier circuit, the positive-side amplifier circuit and negative-side amplifier circuit further include a third and a fourth switch for turning on and off the first and second current sources, respectively, wherein a second current output terminal of the first current mirror circuit is connected via a fifth switch to the current input terminal of the second current mirror circuit and a second current output terminal of the second current mirror circuit is connected via a sixth switch to the current input terminal of the first current mirror circuit, and the first, fourth, and sixth switches are brought into the off state and the second, third, and fifth switches are brought into the on state when the first input signal is inputted to the positive-side amplifier circuit, and the first, fourth, and sixth switches are brought into the on state and the second, third, and fifth switches are brought into the off state when the second input signal is inputted to the negative-side amplifier circuit. This configuration enables still less power consumption.
In a liquid-crystal display unit comprising a liquid-crystal display including pixels, signal lines for selectively applying a signal voltage according to an image signal to each of the pixels, and scanning lines intersecting the signal lines, a driving circuit for driving the signal lines according to an image signal, and a selector circuit for selecting the scanning lines in sequence, the amplifier circuit of the invention is suited to be the amplifier circuit in the driving circuit.
According to the invention, there is provided a liquid-crystal display unit comprising a liquid-crystal display including pixels, signal lines for selectively applying a signal voltage according to an image signal to each of the pixels, and scanning lines intersecting the signal lines; a driving circuit for driving the signal lines according to an image signal; and a selector circuit for selecting the scanning lines in sequence, wherein the driving circuit includes an amplifier circuit comprising amplification stages which are cascade-connected between a signal input terminal to which an input signal is supplied and a signal output terminal to which a capacitive load is connected and that includes at least an input amplification stage and an output amplification stage, and a resistor circuit including at least a resistor inserted between the output terminal of the output amplification stage and the signal output terminal.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.